Xerox Parc Silicon wafer
Year First Appeared
1979
Creator
Lynn Conway, Alan Bell, Martin Newell, Dick Lyon
A silicon wafer produced for Xerox PARC’s Multi‑Project Chip program (circa 1979‑1980) that combined many university VLSI designs onto shared NMOS masks, enabling fast, low‑cost prototyping. The masks were made by Micro‑Mask and the wafers were fabricated at Hewlett‑Packard’s Integrated Circuit Processing Laboratory.
Importance in Internet Culture
MPC runs were coordinated over the ARPANET and directly inspired DARPA’s MOSIS (operational January 1981), which pooled designs onto single wafers for fast turnaround, an early form of automated internet commerce. This rapid‑prototype pipeline accelerated key computing and networking hardware, including Stanford’s MIPS processors and other projects that underpinned the internet and workstation era.
Interesting Fact
PARC’s MPC79 used Micro‑Mask’s ETEC electron‑beam writer with MEBES data and HP/ICPL’s 5‑µm NMOS process (λ = 2.5 µm), returning chips to designers just 29 days after the cutoff. The shared‑mask model drove the per‑project implementation cost down to only a few hundred dollars.